74HC4060 Datasheet, PDF (2/12 Pages) NXP Semiconductors – 14-stage binary ripple counter with oscillator

Philips Semiconductors
14-stage binary ripple counter with oscillator
Product specification
74HC/HCT4060
FEATURES
• All active components on chip
• RC or crystal oscillator configuration
• Output capability: standard (except for R_TC and C_TC)
• I_CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4060 are high-speed Si-gate CMOS
devices and are pin compatible with “4060” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4060 are 14-stage ripple-carry
counter/dividers and oscillators with three oscillator
terminals (RS, R_TC and C_TC), ten buffered outputs (Q₃ to
Q₉ and Q₁₁ to Q₁₃) and an overriding asynchronous
master reset (MR).
The oscillator configuration allows design of either RC or
crystal oscillator circuits. The oscillator may be replaced by
an external clock signal at input RS. In this case keep the
other oscillator pins (R_TC and C_TC) floating.
The counter advances on the negative-going transition of
RS. A HIGH level on MR resets the counter (Q₃ to Q₉ and
Q₁₁ to Q₁₃ = LOW), independent of other input conditions.
In the HCT version, the MR input is TTL compatible, but
the RS input has CMOS input switching levels and can be
driven by a TTL output by using a pull-up resistor to V_CC.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns
SYMBOL PARAMETER
CONDITIONS
t_PHL/ t_PLH
t_PHL
f_max
C_I
C_PD
propagation delay
RS to Q₃
Q_n to Q_n+1
MR to Q_n
maximum clock frequency
input capacitance
power dissipation capacitance per package
C_L = 15 pF; V_CC = 5 V
notes 1, 2 and 3
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW):
P_D = C_PD × V_CC2 × f_i + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz
f_o = output frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
V_CC = supply voltage in V
2. For HC the condition is V_I = GND to V_CC
For HCT the condition is V_I = GND to V_CC − 1.5 V
3. For formula on dynamic power dissipation see next pages.
TYPICAL
HC
HCT
31
31
6
6
17
18
87
88
3.5
3.5
40
40
UNIT
ns
ns
ns
MHz
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2