74HC356 Datasheet, PDF (4/13 Pages) NXP Semiconductors – 8-input multiplexer/register; 3-state

Philips Semiconductors
8-input multiplexer/register; 3-state
Product specification
74HC/HCT356
FUNCTION TABLE
INPUTS
OUTPUTS
ADDRESS ⁽¹⁾
OUTPUT ENABLE
DESCRIPTION
S₂
S₁
S₀ CP
OE₁
OE₂
OE₃ Y
Y
X
X
X
X
H
X
X
Z
Z
outputs in
X
X
X
X
X
H
X
Z
Z
high impedance
X
X
X
X
X
X
L
Z
Z
OFF-state
L
L
L
↑
L
L
H
D_0n
D_0n
L
L
H
↑
L
L
H
D_1n
D_1n
L
H
L
↑
L
L
H
D_2n
D_2n
L
H
H
↑
L
L
H
D_3n
D_3n
data is clocked
H
L
L
↑
L
L
H
D_4n
D_4n
into latch
H
L
H
↑
L
L
H
D_5n
D_5n
H
H
L
↑
L
L
H
D_6n
D_6n
H
H
H
↑
L
L
H
D_7n
D_7n
L
L
L
(2)
L
L
H
D_0p
D_0p
L
L
H
(2)
L
L
H
D_1p
D_1p
L
H
L
(2)
L
L
H
D_2p
D_2p
L
H
H
(2)
L
L
H
D_3p
D_3p
outputs do not
H
L
L
(2)
L
L
H
D_4p
D_4p
change states
H
L
H
(2)
L
L
H
D_5p
D_5p
H
H
L
(2)
L
L
H
D_6p
D_6p
H
H
H
(2)
L
L
H
D_7p
D_7p
Notes
1. This column shows the input address set-up with LE = LOW (address latch is transparent).
2. CP is HIGH, LOW or ↓.
3. D_0n to D_7n = data present at inputs D₀ to D₇ when the data latch clock made the transition from LOW-to-HIGH
D_0p to D_7p = data previously latched into the data latch by the LOW-to-HIGH transition of the data latch clock
H = HIGH voltage level
L = LOW voltage level
X = don’t care
↑ = LOW-to-HIGH CP transition
↓ = HIGH-to-LOW CP transition
Z = high impedance OFF-state
December 1990
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