74HC161 Datasheet, PDF (4/12 Pages) NXP Semiconductors – Presettable synchronous 4-bit binary counter; asynchronous reset

Philips Semiconductors
Presettable synchronous 4-bit binary
counter; asynchronous reset
Product specification
74HC/HCT161
Fig.4 Functional diagram.
FUNCTION TABLE
OPERATING MODE
reset (clear)
parallel load
count
hold
(do nothing)
MR
L
H
H
H
H
H
CP
X
↑
↑
↑
X
X
INPUTS
CEP
X
X
X
h
I
X
CET
X
X
X
h
X
I
PE
X
I
I
h
h
h
D_n
X
I
h
X
X
X
OUTPUTS
Q_n
L
L
H
count
q_n
q_n
TC
L
L
(1)
(1)
(1)
L
Note
1. The TC output is HIGH when CET is HIGH and the counter is at terminal count (HHHH).
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
q = lower case letters indicate the state of the referenced output one set-up time prior to the
LOW-to-HIGH CP transition
X = don’t care
↑ = LOW-to-HIGH CP transition
December 1990
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