74CBTLVD3861_15 Datasheet, PDF (4/19 Pages) NXP Semiconductors – 10-bit level-shifting bus switch with output enable

NXP Semiconductors
74CBTLVD3861
10-bit level-shifting bus switch with output enable
5.2 Pin description
Table 2. Pin description
Symbol
Pin
Description
nc
1
not connected
A1 to A10
2, 3, 4, 5, 6, 7, 8, 9, 10, 11
data input/output (A port)
GND
12
ground (0 V)
B1 to B10
22, 21, 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B port)
OE
23
output enable input (active LOW)
V_CC
24
positive supply voltage
6. Functional description
Table 3.
Input
OE
L
H
Function selection^[1]
Input/output
An, Bn
An = Bn
Z
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
V_CC
V_I
V_SW
I_IK
I_SK
I_SW
I_CC
I_GND
T_stg
P_tot
supply voltage
input voltage
switch voltage
input clamping current
switch clamping current
switch current
supply current
ground current
storage temperature
total power dissipation
enable and disable mode
V_I < 0.5 V
V_I < 0.5 V
V_SW = 0 V to V_CC
T_amb = 40 C to +125 C
0.5
[1] _0.5
[1] _0.5
50
50
-
-
100
65
[2] _-
+4.6
V
+4.6
V
V_CC + 0.5 V
-
mA
-
mA
128
mA
+100
mA
-
mA
+150
C
500
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SSOP24 and TSSOP24 packages: P_tot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN24 package: P_tot derates linearly at 4.5 mW/K above 60 C.
74CBTLVD3861
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 14 December 2011
© NXP B.V. 2011. All rights reserved.
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