SC16IS752 Datasheet, PDF(39/59 Page) NXP Semiconductors – Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support

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SC16IS752 Datasheet, PDF (39/59 Pages) NXP Semiconductors – Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support

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NXP Semiconductors

SC16IS752/SC16IS762

Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

10.3 Addressing

Before any data is transmitted or received, the master must send the address of the

receiver via the SDA line. The ï¬rst byte after the START condition carries the address of

the slave device and the read/write bit. Table 32 shows how the SC16IS752/SC16IS762âs

address can be selected by using A1 and A0 pins. For example, if these 2 pins are

connected to VDD, then the SC16IS752/SC16IS762âs address is set to 0x90, and the

master communicates with it through this address.

Table 32.

VDD

VSS

SCL

SDA

SC16IS752/SC16IS762 address map

SC16IS752/SC16IS762 I2C address (hex)[1]

VDD

VSS

SCL

0x90 (1001 000X)

0x92 (1001 001X)

0x94 (1001 010X)

SDA

0x96 (1001 011X)

VDD

VSS

SCL

0x98 (1001 100X)

0x9A (1001 101X)

0x9C (1001 110X)

SDA

0x9E (1001 111X)

VDD

VSS

SCL

0xA0 (1010 000X)

0xA2 (1010 001X)

0xA4 (1010 010X)

SDA

0xA6 (1010 011X)

VDD

VSS

SCL

0xA8 (1010 100X)

0xAA (1010 101X)

0xAC (1010 110X)

SDA

0xAE (1010 111X)

[1] X = logic 0 for write cycle; X = logic 1 for read cycle.

10.4 Use of subaddresses

When a master communicates with the SC16IS752/SC16IS762 it must send a

subaddress in the byte following the slave address byte. This subaddress is the internal

address of the word the master wants to access for a single byte transfer, or the beginning

of a sequence of locations for a multi-byte transfer. A subaddress is an 8-bit byte. Unlike

the device address, it does not contain a direction (R/W) bit, and like any byte transferred

on the bus it must be followed by an acknowledge.

A register write cycle is shown in Figure 18. The START is followed by a slave address

byte with the direction bit set to âwriteâ, a subaddress byte, a number of data bytes, and a

STOP signal. The subaddress indicates which register the master wants to access, and

the data bytes which follow will be written one after the other to the subaddress location.

Table 33 and Table 34 show the bitsâ presentation at the subaddress byte for I2C-bus and

SPI interfaces. Bit 0 is not used, bits 2:1 select the channel, bits 6:3 select one of the

UART internal registers. Bit 7 is not used with the I2C-bus interface, but it is used by the

SPI interface to indicate a read or a write operation.

SC16IS752_SC16IS762_6

Product data sheet

Rev. 06 â 19 December 2006

39 of 59

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