SC16IS752 Datasheet, PDF (25/59 Pages) NXP Semiconductors – Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support

NXP Semiconductors
SC16IS752/SC16IS762
Dual UART with I²C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Table 15. Line Control Register bits description …continued
Bit
Symbol Description
5
LCR[5]
Set parity. LCR[5] selects the forced parity format (if LCR[3] = logic 1).
logic 0 = parity is not forced (normal default condition).
LCR[5] = logic 1 and LCR[4] = logic 0: parity bit is forced to a logical 1
for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1: parity bit is forced to a logical 0
for the transmit and receive data.
4
LCR[4]
Parity type select.
logic 0 = odd parity is generated (if LCR[3] = logic 1)
logic 1 = even parity is generated (if LCR[3] = logic 1)
3
LCR[3]
Parity enable.
logic 0 = no parity (normal default condition)
logic 1 = a parity bit is generated during transmission and the receiver
checks for received parity
2
LCR[2]
Number of Stop bits. Specifies the number of stop bits.
0 to 1 stop bit (word length = 5, 6, 7, 8)
1 to 1.5 stop bits (word length = 5)
1 = 2 stop bits (word length = 6, 7, 8)
1:0
LCR[1:0] Word length bits 1, 0. These two bits specify the word length to be
transmitted or received (see Table 18).
Table 16.
LCR[5]
X
0
0
1
1
LCR[5] parity selection
LCR[4]
LCR[3]
X
0
0
1
1
1
0
1
1
1
Parity selection
no parity
odd parity
even parity
forced parity ‘1’
forced parity ‘0’
Table 17.
LCR[2]
0
1
1
LCR[2] stop bit length
Word length (bits)
5, 6, 7, 8
5
6, 7, 8
Stop bit length (bit times)
1
1¹â„₂
2
Table 18.
LCR[1]
0
0
1
1
LCR[1:0] word length
LCR[0]
Word length (bits)
0
5
1
6
0
7
1
8
SC16IS752_SC16IS762_6
Product data sheet
Rev. 06 — 19 December 2006
© NXP B.V. 2006. All rights reserved.
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