SAA7151B Datasheet, PDF (37/49 Pages) NXP Semiconductors – Digital multistandard colour decoder with SCART interface DMSD2-SCART

Philips Semiconductors
Digital multistandard colour decoder with
SCART interface (DMSD2-SCART)
Product specification
SAA7151B
ASTD
“10”
Automatic standard switching:
0 = off; 1 = on
−-−-−-−-−-−-−-−-− -−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−
OFTS
Select output format:
0 = 4 : 1 : 1 format; 1 = 4 : 2 : 2 format.
IPBP
External UV signal interpolation filter:
0 = active; 1 = bypassed
−-−-−-−-−-−-−-−-− -−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−
CDVI
Chrominance PLL filter selection for:
0 = VTR or TV source; 1 = fast time constant
for FSC-PLL (only for special applications)
−-−-−-−-−-−-−-−-− -−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−-−
YDEL3 to YDEL0 Luminance delay compensation in 37 ns steps:
YDEL3
YDEL2 YDEL1
YDEL0
delay
0
0
0
0
0
1
1
1
)
)
0 to 259 ns (step 0 to 7)
1
0
0
0
1
1
1
1
) −296 to −37 ns (negative delay; step -8 to
) -1)
CHCV7 to CHCV0 Chroma gain reference value
“11”
D7 D6 D5 D4 D3 D2 D1 D0 gain
1 1 1 1 1 1 1 1 maximum gain
:
:
to
1 0 1 1 0 0 1 1 ^{DTV level}
:
:
to
0 0 1 1 1 1 0 1 ^{CCIR level}
:
:
to
0 0 0 0 0 0 0 0 ^{minimum gain}
)
)
) ^{default programmed values}
) ^{dependent on application}
)
April 1993
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