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SAA7388 Datasheet, PDF (36/60 Pages) NXP Semiconductors – Error correction and host interface IC for CD-ROM ELM
Philips Semiconductors
Error correction and host interface IC for
CD-ROM (ELM)
11 TIMING CHARACTERISTICS
SYMBOL
PARAMETER
CD-DSP timing; see Figs 4, 5 and 6; note 1
INPUT: BCK
tPO
input clock period
tHC
clock HIGH time
tLC
clock LOW time
INPUTS: WS AND DATA
tST
set-up time
tHT
hold time
Q-to-W subcode timing; see Figs 7 and 8; note 1
INPUT: SFSY
tFW
sync pulse width
tF
frame cycle
tLW
LOW level period
tHW
HIGH level period
OUTPUT: RCK
tCD
tHPW
tLPW
output delay time
HIGH level period
LOW level period
INPUT: SUB
tHD
data hold time
tAC
data access time
tPAC
P data access time
SRAM interface timing; see Figs 9 and 10; note 2
tRC
read cycle period
tDS
data set-up time
tDH
data hold time
tWC
write cycle time
tWP
write pulse time
tAS
address set-up time
tWR
write recovery time
tDO
data output time
CONDITIONS
Preliminary specification
SAA7388
MIN. TYP. MAX. UNIT
40
−
1050 ns
14
−
−
ns
14
−
−
ns
8
−
−
ns
0
−
−
ns
244
272 800
µs
122
136 150
µs
1.5
68
−
µs
4
68
−
µs
5
20
30
µs
0.6
4
6
µs
2
4
9
µs
0
−
−
µs
−
−
0.8
µs
−
2
4
µs
6T
−
−
ns
30
−
−
ns
5
−
−
ns
6T
−
−
ns
2T
−
−
ns
T
−
−
ns
T
−
−
ns
−
−
30
ns
1996 Apr 26
36