SAA7388 Datasheet, PDF (19/60 Pages) NXP Semiconductors – Error correction and host interface IC for CD-ROM ELM

Philips Semiconductors
Error correction and host interface IC for
CD-ROM (ELM)
Preliminary specification
SAA7388
7.7.16 STAT2
The bits MODE and FORM in this register indicate the mode, form and correction scheme of the current frame.
Table 11 STAT2 register bits
BIT 7
RMOD3
BIT 6
RMOD2
BIT 5
RMOD1
BIT 4
RMOD0
BIT 3
MODE
BIT 2
FORM
BIT 1
RFORM1
BIT 0
RFORM2
Table 12 MODE and FORM bits
MODE
0
1
X
FORM
0
0
1
SETTING
Mode 1
Mode 2, Form 1
Mode 2, Form 2 or ECC correction impossible
The Mode bit is always copied from the CTRL1 register.
The Form information is determined by the AUTORQ bit in
the CTRL0 register. When this bit is set to logic 0, the Form
information is copied from the CTRL1 register. When this
bit is set to logic 1 the Form information is copied from the
Mode header byte.
If correction of the block was impossible, FORM will be set
to logic 1 regardless of the requested correction. This will
happen under the following circumstances:
• An illegally synchronized block (ILSYNC = 1 or
LBLK = 1)
• A data block specified as Mode 2, Form 2, or detected
as Mode 2, Form 2
• A Mode 2 submode byte error detected during
processing
• A mode mismatch detected by the mode check function
(MCHQRQ = 1)
• A mode byte error detected by the mode check function
(MCHQRQ = 1).
The RFORM2, RFORM1 bits contain a preview of the form
bit for the next frame
Table 13 RFORM2 and RFORM1 bits
RFORM1
0
0
1
RFORM2
0
1
X
MEANING
Form 0
Form 1
error in form byte
The RMOD3, RMOD2, RMOD1 and RMOD0 bits contain
a preview of the next block MODE byte.
RMOD3 = bit7 # bit6 # bit5 # bit4 # bit3 # C2FLAG
RMOD2 = bit2 # C2FLAG
RMOD1 = bit1 # C2FLAG
RMOD0 = bit0 # C2FLAG
1996 Apr 26
19