SA5225 Datasheet, PDF (3/10 Pages) NXP Semiconductors – Fiber optic postamplifier

Philips Semiconductors
Fiber optic postamplifier
Product specification
SA5225
PIN DESCRIPTIONS
PIN NO. NAME
FUNCTION
1
C_AZN Auto-zero capacitor pin. Connecting a capacitor between this pin and C_AZP will cancel the offset voltage of the
limiting amplifier.
2
C_AZP Auto-zero capacitor pin. Connecting a capacitor between this pin and C_AZN will cancel the offset voltage of the
limiting amplifier.
3
GND_A Analog GND pin. Connect to ground for +5V upshifted ECL operation. Connect to –5.2V for standard ECL
operation. Must be at same potential as GND_E (Pin 11).
4
D_IN
Differential input. DC bias level is set internally at approximately 2.9V. Complimentary to D_IN (Pin 5).
5
D_IN
Differential input. DC bias level is set internally at approximately 2.9V. Complimentary to D_IN (Pin 4).
6
V_CCA Analog power supply pin. Connect to a +5V supply for upshifted ECL operation. Connect to ground for standard
ECL operation. Must be at same potential as V_CCE (Pin 14).
7
C_F
Filter capacitor for level detector. Capacitor should be connected between this pin and V_CCA.
8
JAM This ECL-compatible input controls the output buffers D_OUT and D_OUT (Pins 12 and 13). When an ECL LOW signal
is applied, the outputs will follow the input signal. When an ECL HIGH signal is applied, the D_OUT and D_OUT pins
will latch into LOW and HIGH states, respectively. When left unconnected, this pin is actively pulled-low (JAM OFF).
9
ST
Input signal level-detect STATUS. This ECL output is high when the input signal is below the user programmable
threshold level.
10
ST
ECL compliment of ST (Pin 9).
11
GND_E Digital GND pin. Connect to ground for +5V upshifted ECL operation. Connect to a negative supply for normal ECL
operation. Must be at the same potential as GND_A (Pin 3).
12
D_OUT ECL-compatible output. Nominal level is V_CCE–1.3V. When JAM is HIGH, this pin will be forced into an ECL HIGH
condition. Complimentary to D_OUT (Pin 13).
13
D_OUT ECL-compatible output. Nominal level is V_CCE–1.3V. When JAM is HIGH, this pin will be forced into an ECL LOW
condition. Complimentary to D_OUT (Pin 12).
14
V_CCE Digital power supply pin. Connect to a +5V supply for upshifted ECL operation. Connect to ground during normal
ECL operation. Must be at the same potential as V_CCA (Pin 6).
15
V_REF Reference voltage for threshold level voltage divider. Nominal value is approximately 2.64V.
16
V_SET Input threshold level setting circuit. This input can come from a voltage divider between V_REF and GND_A.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
V_CC
Power supply (V_CC - GND)
T_A
Operating ambient
T_J
Operating junction
T_STG
P_D
Storage
Power dissipation, T_A = 25°C (still air)¹
16-pin Plastic SO
NOTE:
1. Maximum dissipation is determined by the ambient temperature and the thermal resistance,
θ_JA: 16-pin SO: θ_JA = 110°C/W
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
V_CC
Supply voltage
T_A
Ambient temperature ranges
T_J
Junction temperature ranges
RATING
6
–40 to +85
–55 to +150
–65 to +150
1100
RATING
4.5 to 5.5
–40 to +85
–40 to +110
UNITS
V
°C
°C
°C
mW
UNITS
V
°C
°C
1998 Oct 07
3