PHW50NQ15T Datasheet, PDF (3/7 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PHW50NQ15T
Normalised Power Derating, PD (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
Mounting Base temperature, Tmb (C)
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
Normalised Current Derating, ID (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100 125 150 175
Mounting Base temperature, Tmb (C)
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb)
1000 ^{Peak Pulsed Drain Current, IDM (A)}
RDS(on) = VDS/ ID
100
tp = 10 us
100 us
10
D.C.
1 ms
10 ms
100 ms
1
1
10
100
1000
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
1 ^{Transient thermal impedance, Zth j-mb (K/W)}
D = 0.5
0.2
0.1 _0.1
0.05
0.02
0.01
PD _tp D = tp/T
single pulse
0.001
1E-06
1E-05
1E-04 1E-03 1E-02
Pulse width, tp (s)
T
1E-01
1E+00
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
50 ^{Drain Current, ID (A)}
Tj = 25 C
45
VGS = 10V
8V
6V
40
35
30
5.4 V
25
20
5.2 V
15
5V
10
4.8 V
5
4.6 V
4.4 V
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
Drain-Source On Resistance, RDS(on) (Ohms)
0.15
0.14 ^{4.4 V}
4.8 V
0.13
4.6V
0.12
0.11
5V
5.2V
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
8V
0
0
5
10
15
20
Drain Current, ID (A)
Tj = 25 C
5.4V
6V
VGS = 10V
25
30
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(V_GS)
August 1999
3
Rev 1.000