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PDTC143TMB_15 Datasheet, PDF (3/11 Pages) NXP Semiconductors – NPN resistor-equipped transistor; R1 = 4.7 kΩ, R2 = open
NXP Semiconductors
PDTC143TMB
NPN resistor-equipped transistor; R1 = 4.7 kΩ, R2 = open
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VCBO
VCEO
VEBO
IO
ICM
Ptot
Tj
Tamb
Tstg
collector-base voltage
collector-emitter voltage
emitter-base voltage
output current
peak collector current
total power dissipation
junction temperature
ambient temperature
storage temperature
open emitter
open base
open collector
pulsed; tp ≤ 1 ms
Tamb ≤ 25 °C
Min
-
-
-
-
-
[1]
-
-
-65
-65
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
Max Unit
50 V
50 V
5
V
100 mA
100 mA
250 mW
150 °C
150 °C
150 °C
300
Ptot
(mW)
200
006aad009
100
0
-75
-25
25
75
FR4 PCB, standard footprint
Fig 2. Power derating curve for DFN1006B-3 (SOT883B)
125
175
Tamb (°C)
PDTC143TMB
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 May 2012
© NXP B.V. 2012. All rights reserved.
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