PBSS4130PANP_15 Datasheet, PDF (3/21 Pages) NXP Semiconductors – 30 V, 1 A NPN/PNP low VCEsat (BISS) transistor

NXP Semiconductors
PBSS4130PANP
30 V, 1 A NPN/PNP low VCEsat (BISS) transistor
Symbol
V_EBO
I_C
I_CM
I_B
I_BM
P_tot
Per device
P_tot
T_j
T_amb
T_stg
Parameter
emitter-base voltage
collector current
peak collector current
base current
peak base current
total power dissipation
Conditions
open collector
single pulse; t_p ≤ 1 ms
single pulse; t_p ≤ 1 ms
T_amb ≤ 25 °C
Min Max Unit
-
7
V
-
1
A
-
2
A
-
0.3 A
-
1
A
[1]
-
370 mW
[2]
-
570 mW
[3]
-
530 mW
[4]
-
700 mW
[5]
-
450 mW
[6]
-
760 mW
[7]
-
700 mW
[8]
-
1450 mW
total power dissipation
T_amb ≤ 25 °C
junction temperature
ambient temperature
storage temperature
[1]
-
510 mW
[2]
-
780 mW
[3]
-
730 mW
[4]
-
960 mW
[5]
-
620 mW
[6]
-
1040 mW
[7]
-
960 mW
[8]
-
2000 mW
-
150 °C
-55 150 °C
-65 150 °C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided 35 µm copper strip line, tin-plated
and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
collector 1 cm².
[3] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
[4] _{Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm}²_.
[5] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
[6] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
collector 1 cm².
[7] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
[8] _{Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm}²_.
PBSS4130PANP
Product data sheet
All information provided in this document is subject to legal disclaimers.
12 December 2012
© NXP B.V. 2012. All rights reserved
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