BUK9230-100B_15 Datasheet, PDF (3/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
BUK9230-100B
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
V_DS
V_DGR
V_GS
I_D
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T_j ≥ 25 °C; T_j ≤ 185 °C
R_GS = 20 kΩ
T_mb = 100 °C; V_GS = 5 V; see Figure 1
T_mb = 25 °C; V_GS = 5 V; see Figure 1;
see Figure 3
I_DM
peak drain current
T_mb = 25 °C; pulsed; t_p ≤ 10 µs;
see Figure 3
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
T_mb = 25 °C; see Figure 2
I_S
source current
I_SM
peak source current
Avalanche ruggedness
T_mb = 25 °C
pulsed; t_p ≤ 10 µs; T_mb = 25 °C
E_DS(AL)S
non-repetitive drain-source
avalanche energy
I_D = 47 A; V_sup ≤ 100 V; R_GS = 50 Ω;
V_GS = 5 V; T_j(init) = 25 °C; unclamped
Min Max Unit
-
100 V
-
100 V
-15 15 V
-
33 A
-
47 A
-
185 A
-
167 W
-55 185 °C
-55 185 °C
-
47 A
-
185 A
-
150 mJ
50
I_D
(A)
40
30
20
10
0
0
03no40
50
100
150
200
T_mb (°C)
120
P_der
(%)
80
03no96
40
0
0
50
100
150
200
T_mb (°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
BUK9230-100B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 1 February 2011
© NXP B.V. 2011. All rights reserved.
3 of 14