74HC670 Datasheet, PDF (3/9 Pages) NXP Semiconductors – 4 x 4 register file; 3-state

Philips Semiconductors
4 x 4 register file; 3-state
PIN DESCRIPTION
PIN NO.
5, 4
8
10, 9, 7, 6
11
12
14, 13
15, 1, 2, 3
16
SYMBOL
R_A, R_B
GND
Q₀ to Q₃
RE
WE
W_A, W_B
D₀ to D₃
V_CC
NAME AND FUNCTION
read address inputs
ground (0 V)
data outputs
3-state output read enable input (active LOW)
write enable input (active LOW)
write address inputs
data inputs
positive supply voltage
Product specification
74HC/HCT670
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
WRITE MODE SELECT TABLE
OPERATING
MODE
write data
data latched
INPUTS
WE D_n
LL
LH
HX
INTERNAL
LATCHES⁽¹⁾
L
H
no change
Note
1. The write address (W_A and W_B) to the
“internal latches” must be stable while WE is
LOW for conventional operation.
READ MODE SELECT TABLE
OPERATING
MODE
read
disabled
INPUTS
OUTPUT
RE INTERNAL LATCHES⁽¹⁾
Q_n
L
L
L
L
H
H
H
X
Z
Notes
1. The selection of the “internal latches” by read address
(R_A and R_B) are not constrained by WE or RE operation.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
December 1990
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