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| 74HC190 Datasheet, PDF (3/13 Pages) NXP Semiconductors – Presettable synchronous BCD decade up/down counter | |||
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Philips Semiconductors
Presettable synchronous BCD decade
up/down counter
Product speciï¬cation
74HC/HCT190
QUICK REFERENCE DATA
GND = 0 V; Tamb= 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
fmax
CI
CPD
propagation delay CP to Qn
maximum clock frequency
input capacitance
power dissipation capacitance per flip-flop
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD Ã VCC2 Ã fi + â (CL Ã VCC2 Ã fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
â (CL Ã VCC2 Ã fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC â 1.5 V
TYPICAL
HC
22
28
3.5
36
HCT
24
30
3.5
38
UNIT
ns
MHz
pF
pF
ORDERING INFORMATION
See â74HC/HCT/HCU/HCMOS Logic Package Informationâ.
December 1990
3
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