74HC109 Datasheet, PDF(3/9 Page) NXP Semiconductors – Dual JK flip-flop with set and reset; positive-edge trigger

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74HC109 Datasheet, PDF (3/9 Pages) NXP Semiconductors – Dual JK flip-flop with set and reset; positive-edge trigger

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Philips Semiconductors

Dual JK ï¬ip-ï¬op with set and reset;

positive-edge trigger

Product speciï¬cation

74HC/HCT109

PIN DESCRIPTION

PIN NO.

1, 15

2, 14, 3, 13

4, 12

5, 11

6, 10

7, 9

SYMBOL

1RD, 2RD

1J, 2J, 1K, 2K

1CP, 2CP

1SD, 2SD

1Q, 2Q

GND

VCC

NAME AND FUNCTION

asynchronous reset-direct input (active LOW)

synchronous inputs; ï¬ip-ï¬ops 1 and 2

clock input (LOW-to-HIGH, edge-triggered)

asynchronous set-direct input (active LOW)

true ï¬ip-ï¬op outputs

complement ï¬ip-ï¬op outputs

ground (0 V)

positive supply voltage

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

1997 Nov 25

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