74F711A Datasheet, PDF (3/16 Pages) NXP Semiconductors – consist of five 2-to-1 multiplexers designedfor address multiplexing of dynamic RAMs and other multiplexing applicationThe outputs source 15mA

Philips Semiconductors
Multiplexers
Product specification
74F711A/74F711–1/
74F712A/74F712–1
PIN CONFIGURATION – 74F711A/74F711-1
D0a 1
D0b 2
Q0 3
Q1 4
GND 5
Q2 6
Q3 7
Q4 8
S9
INV 10
20 D1a
19 D1b
18 D2a
17 D2b
16 V_CC
15 D3a
14 D3b
13 D4a
12 D4b
11 OE
SF01215
LOGIC SYMBOL – 74F711A/74F711-1
1 2 20 19 18 17 15 14 13 12
D0a D0b D1a D1b D2a D2b D3a D3b D4a D4b
9
S
10
OE
11
INV
Q0 Q1 Q2 Q3 Q4
V_CC = Pin 16
GND = Pin 5
3
4
6
7
8
SF01217
LOGIC SYMBOL (IEEE/IEC) – 74F711A/74F711-1
MUX
1
G
11
EN1
10
M
1
2
1
3
20
19
4
18
17
6
15
14
7
13
8
12
SF01219
PIN CONFIGURATION – 74F712A/74F712-1
S0 ¹
S1 ²
Q0 ³
Q1 ⁴
Q2 ⁵
GND 6
Q3 7
Q4 ⁸
D0c ⁹
D1c 10
D2c ¹¹
D3c 12
24 _D0a
23 _D1a
22 _D2a
21 _D3a
20 _D4a
19 V_CC
18 D0b
17 D1b
16 D2b
15 _D3b
14 _D4b
13 _D4c
SF01216
LOGIC SYMBOL – 74F712A/74F712-1
24 18 9 23 17 10 22 16 11 21 15 12 20 14 13
D0a D0b D0c D1a D1b D1c D2a D2b D2c D3a D3b D3c D4a D4b D4c
1
S0
2
S1
Q0 Q1 Q2 Q3 Q4
V_CC = Pin 19
GND = Pin 6
3
4
5
78
SF01218
LOGIC SYMBOL (IEEE/IEC) – 74F712A/74F712-1
MUX
1
G1
2
G2
24
18
3
9
23
17
4
10
22
16
5
11
21
15
7
12
20
14
8
13
SF01220
1990 Dec 13
3