AN11695_15 Datasheet, PDF (25/29 Pages) NXP Semiconductors – NXQ1TXA5 one-chip 5 V Qi wireless transmitter

NXP Semiconductors
AN11695
NXQ1TXA5 one-chip 5 V Qi wireless transmitter
• More thermal vias that surround the IC from the top GND layer to the bottom GND
layer can improve the thermal connection from top to bottom.
• Thermal vias in remote areas (that is: relatively far from the dissipating element) do
not really contribute to thermal performance. The thermal gradient from top to bottom
layer is already minimal in remote areas. So, connecting them with a low thermal
impedance path does not bring much improvement. All remote vias shown in
Figure 13 have an electrical (non-thermal) purpose.
• The bottom layer (or other inner layer if there is a multi-layer PCB) must be a (nearly)
fully filled copper layer. This layer spreads the heat over the PCB and, if the layer is
the bottom layer, radiates the heat to the ambient.
• The outer layers (top and bottom layers) of the PCB must be covered with a
high-emissivity coating. In most circumstances, normal solder resist is good enough
because it has an emissivity of 0.9 to 0.95. Do not leave the copper blank or coat it
with a reflective (e.g. gold) finish.
• Making the PCB larger enhances thermal performance of the application significantly
and making the PCB too small brings the application into thermal trouble. Thermal
radiation is an important factor to move heat out of the NXQ1TXA5 component and
the PCB. Board surface area is more or less proportional to the capability of the board
capability to lose heat through radiation. Figure 16 shows a graph that gives an
impression of how R_th(j-a) (thermal resistance from the NXQ1TXA5 IC silicon to the
ambient) varies with PCB area. Trend lines for 2-layer/70 m copper, 4-layer/35 m
copper and 4-layer/70 m copper are given.

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(1) 4-layer; 70 m
(2) 4-layer; 35 m
(3) 2-layer; 70 m
Fig 16. Typical trend lines for the R_th(j-a) versus the PCB area
AN11695
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 3 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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