AN11695_15 Datasheet, PDF (18/29 Pages) NXP Semiconductors – NXQ1TXA5 one-chip 5 V Qi wireless transmitter

NXP Semiconductors
AN11695
NXQ1TXA5 one-chip 5 V Qi wireless transmitter
2.1.7 NFC (optional)
The NXQ1TXA5 can be used with an NFC enabled device. When the NFC_FD_N pin
(pin 6) is LOW, a start-up delay of about 2 seconds is added when an NFC enabled
receiver is placed on the charger. The 2 seconds delay allows the NFC device to finalize
communication with an NFC TAG before power transfer begins. The NXQ1TXA5 starts
after the delay. When it has detected a WPC-compliant Qi receiver, it starts to transfer
power to this device. The NXQ1TXA5 disables the NFC reader by pulling low the
NFC_DIS pin (pin 32).
If the NFC start-up delay function is not required, the NFC_FD_N pin must be connected
to V_DDP (5 V).
When the NXQ1TXA5 is in power transfer mode, the NFC_DIS output is active-LOW
(open-drain). If NFC_DIS is not used, the pin can be connected to GND.
2.1.8 I²C interface (optional)
An I²C interface is provided with the SDA and SCL pins (pin 3 and pin 4). Communication
with the NXQ1TXA5 processor core can take place through these pins.
To use the SDA and SCL I²C lines, they must have a pull-up resistor to a 3.3 V (maximum
3.6 V) voltage level.
When I²C communication is not required, the pins can be left floating or they can be
grounded.
The detailed use of the I²C interface is outside the scope of this application note. Contact
NXP application support for assistance.
AN11695
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 3 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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