PCA9541 Datasheet, PDF (24/30 Pages) NXP Semiconductors – 2-to-1 I2C master selector with interrupt logic and reset

Philips Semiconductors
2-to-1 I²C demultiplexer with interrupt logic and reset
Product data sheet
PCA9541
SDA
t_BUF
t_LOW
t_R
t_F
SCL
P
t_HD;STA
S
t_HD;DAT
t_HIGH
t_SU;DAT
t_HD;STA
t_SU;STA
Sr
Figure 22. Definition of timing on the I²C-bus
t_SP
t_SU;STO
P
SU00645
handbook, full pagewidth
PROTOCOL
START
CONDITION
(S)
BIT7
MSB
(A7)
t _SU;STA
t _LOW
t _HIGH
BIT6
(A6)
1 / f _SCL
SCL
t _BUF
tr
tf
SDA
BIT8
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(S)
t _HD;STA
t _SU;DAT
t _HD;DAT
t _VD;DAT
t _VD;ACK
Figure 23. I²C-bus timing diagram; rise and fall times refer to V_IL and V_IH
t _SU;STO
SW02278
START
SCL
ACK OR READ CYCLE
SDA
30%
RESET
50%
t_REC
LEDx
2004 Oct 01
50%
t_RESET
50%
t_W
Figure 24. Definition of RESET timing
t_RESET
50%
LED OFF
SW02336
23