PCA21125 Datasheet, PDF (21/42 Pages) NXP Semiconductors – SPI-bus Real-Time Clock and calendar

NXP Semiconductors
PCA21125
SPI-bus Real-Time Clock and calendar
countdown counter 01
n
CDTF
INT
SCL
instruction
(1)
8th clock
CLEAR INSTRUCTION
001aaf909
(1) Indicates normal duration of INT pulse (bit TI_TP = 1).
Fig 11. Example of shortening the INT pulse by clearing the TF flag
The timing shown for clearing bit TF in Figure 11 is also valid for the non-pulsed interrupt
mode, i.e., when bit TI_TP = 0, where the pulse can be shortened by setting bit TIE = 0.
8.7.3 Alarm interrupts
Generation of interrupts from the alarm function is controlled via bit AIE (register
Control_2, see Table 6). If bit AIE is enabled, the INT pin follows the status of bit AF.
Clearing bit AF will immediately clear INT. No pulse generation is possible for alarm
interrupts; see Figure 12.
minute counter 44 45
minute alarm 45
AF
INT
SCL
instruction
8th clock
CLEAR INSTRUCTION
001aaf910
Example where only the minute alarm is used and no other interrupts are enabled.
Fig 12. AF timing
8.8 External clock test mode
A test mode is available which allows for on-board testing. In this mode it is possible to set
up test conditions and control the operation of the RTC.
The test mode is entered by setting the EXT_TEST bit in register Control_1 (see Table 5).
The CLKOUT pin then becomes an input. The test mode replaces the internal signal with
the signal applied to pin CLKOUT.
PCA21125_1
Product data sheet
Rev. 01 — 16 November 2009
© NXP B.V. 2009. All rights reserved.
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