OM6206 Datasheet, PDF (21/36 Pages) NXP Semiconductors – 65 X 102 pixels matrix LCD driver

Philips Semiconductors
65 × 102 pixels matrix LCD driver
Product specification
OM6206
2. RES may be LOW before V_DD goes HIGH.
3. All signal timing is based on 20% to 80% of V_DD and a maximum rise and fall time of 10 ns.
4. t_H5 is the time from the previous SCLK positive edge (irrespective of the state of SCE) to the negative edge of SCE.
handbook, full pagewidth
SCE
D/ C
SCLK
SDIN
t _S2
t _H2
t _PWH2
t _S3
t _H3
( t _H5 )
t _H5
t _PWL1
t _PWH1
t _CYC
t _S2
t _H4
t _S4
Fig.15 Serial interface timing.
MGT872
handbook, full pagewidth
VDD
RES
VDD
RES
2001 Nov 14
t _RW
t _RW
t _VHRL
t _RW
Fig.16 Reset timing.
21
t _RW
MGT873