OM6206 Datasheet, PDF (20/36 Pages) NXP Semiconductors – 65 X 102 pixels matrix LCD driver

Philips Semiconductors
65 × 102 pixels matrix LCD driver
Product specification
OM6206
SYMBOL
PARAMETER
TC1
V_LCD temperature
coefficient 1
TC2
V_LCD temperature
coefficient 2
TC3
V_LCD temperature
coefficient 3
CONDITIONS
note 7
note 7
note 7
MIN.
TYP.
MAX. UNIT
−
−0.76 × 10^−3V_LCD −
V/°C
−
−1.05 × 10^−3V_LCD −
V/°C
−
−2.10 × 10^−3V_LCD −
V/°C
Notes
1. The maximum possible V_LCD voltage that may be generated is dependent on voltage, temperature and (display) load.
2. Internal clock.
3. During Power-down mode, all static currents are switched off.
4. If external V_LCD, the display load current is not transmitted to I_DD.
5. Tolerance depends on the temperature; typical null at T_amb = 27 °C; maximum tolerance values are measured at the
temperate range limit; maximum tolerance is proportional to V_LCD.
6. For TC1 to TC3.
7. V_DD = 2.8 V; no serial clock; T_amb = −20 to +70 °C; display load = 10 µA.
12 AC CHARACTERISTICS
V_DD = 2.5 to 5.5 V; V_SS = 0 V; V_LCD = 4.5 to 9.0 V; T_amb = −40 to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
f_osc
f_ext
f_frame
t_VHRL
t_RW
oscillator frequency
external clock frequency
frame frequency
V_DD HIGH to RES LOW time
RES LOW pulse width
V_DD = 2.8 V; T_amb = −20 to +70 °C 22
20
f_osc or f_ext = 38 kHz; note 1
−
see Fig.16
0 ⁽²⁾
see Fig.16
100
Serial bus timing characteristics; see Fig.15
f_SCLK
clock frequency
V_DD = 3.0 V ±10%; note 3
0
t_CYC
SCLK clock cycle time
250
t_PWH1
SCLK pulse width HIGH
100
t_PWL1
SCLK pulse width LOW
100
t_S2
SCE setup time
60
t_H2
SCE hold time
100
t_PWH2
SCE HIGH time
100
t_H5
SCE start hold time
note 4
100
t_S3
D/C setup time
100
t_H3
D/C hold time
100
t_S4
SDIN setup time
100
t_H4
SDIN hold time
100
TYP.
38
38
73
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
67
67
−
1
−
4
−
−
−
−
−
−
−
−
−
−
−
UNIT
kHz
kHz
Hz
µs
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1. f_frame = _5--f-^e-2--^x-0-^t-
2001 Nov 14
20