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TDA8764A Datasheet, PDF (2/24 Pages) NXP Semiconductors – 10-bit high-speed low-power ADC
Philips Semiconductors
10-bit high-speed low-power ADC
Product specification
TDA8764A
FEATURES
• 10-bit resolution (binary or gray code)
• Sampling rate up to 60 MHz
• DC sampling allowed
• One clock cycle conversion only
• High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 5 MHz full-scale
input at fclk = 60 MHz)
• No missing codes guaranteed
• In Range (IR) CMOS output
• TTL and CMOS levels compatible digital inputs
• 2.7 to 3.6 V CMOS digital outputs
• Low-level AC clock input signal allowed
• Power dissipation only 312 mW
• Low analog input capacitance, no buffer amplifier
required
• No sample-and-hold circuit required.
APPLICATIONS
High-speed analog-to-digital conversion for:
• Video data digitizing
• Radar pulse analysis
• High energy physics research
• Transient signal analysis
• Σ∆ modulators
• Medical imaging.
GENERAL DESCRIPTION
The TDA8764A is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary or gray coded digital words at a maximum
sampling rate of 60 MHz. All digital inputs and outputs are
TTL and CMOS compatible, although a low-level sine
wave clock input signal is allowed.
The device requires an external source to drive its
reference ladder.
ORDERING INFORMATION
TYPE NUMBER
TDA8764ATS/6
TDA8764AHL/6
NAME
SSOP28
LQFP32
PACKAGE
DESCRIPTION
plastic shrink small outline package; 28 leads; body width 5.3 mm
plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm
VERSION
SOT341-1
SOT401-1
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VCCA
VCCD
VCCO
ICCA
ICCD
ICCO
INL
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
integral non-linearity
DNL
differential non-linearity
fclk(max) maximum clock frequency
Ptot
total power dissipation
CONDITIONS
MIN.
4.75
4.75
2.7
−
−
fclk = 60 MHz; ramp input −
fclk = 60 MHz; ramp input −
fclk = 60 MHz; ramp input −
TDA8764ATS and
60
TDA8764AHL
fclk = 60 MHz; ramp input −
TYP.
5.0
5.0
3.3
29
33
0.5
±0.8
±0.35
−
312
MAX.
5.25
5.25
3.6
37
40
2.0
±2
±0.9
−
411
UNIT
V
V
V
mA
mA
mA
LSB
LSB
MHz
mW
2000 Jul 03
2