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PDTC114YE Datasheet, PDF (2/8 Pages) NXP Semiconductors – NPN resistor-equipped transistor
Philips Semiconductors
NPN resistor-equipped transistor
Product specification
PDTC114YE
FEATURES
• Built-in bias resistors R1 and R2 (typ. 10 kΩ and 47 kΩ
respectively)
• Simplification of circuit design
• Reduces number of components and board space.
PINNING
PIN
1
2
3
DESCRIPTION
base/input
emitter/ground
collector/output
APPLICATIONS
• Especially suitable for space reduction in interface and
driver circuits
• Inverter circuit configurations without use of external
resistors.
DESCRIPTION
NPN resistor-equipped transistor in a SC-75 (SOT416)
plastic package.
handbook, halfpage 3
1
2
Top view
3
R1
1
R2
2
MAM346
Fig.1 Simplified outline (SC-75; SOT416) and
symbol.
MARKING
TYPE NUMBER
PDTC114YE
MARKING CODE
33
1
3
2
MGA893 - 1
Fig.2 Equivalent inverter symbol.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
VCBO
VCEO
VEBO
VI
IO
ICM
Ptot
Tstg
Tj
Tamb
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
operating ambient temperature
open emitter
open base
open collector
Tamb ≤ 25 °C; note 1
Note
1. Transistor mounted on an FR4 printed-circuit board.
1999 May 18
2
MIN.
−
−
−
MAX.
50
50
10
UNIT
V
V
V
−
+40
V
−
−6
V
−
100
mA
−
100
mA
−
150
mW
−65
+150
°C
−
150
°C
−65
+150
°C