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PDTC114TT Datasheet, PDF (2/8 Pages) NXP Semiconductors – NPN resistor-equipped transistor
Philips Semiconductors
NPN resistor-equipped transistor
Objective specification
PDTC114TT
FEATURES
• Built-in bias resistor R1 (typ. 10 kΩ)
• Simplification of circuit design
• Reduces number of components
and board space.
APPLICATIONS
• Especially suitable for space
reduction in interface and driver
circuits
• Inverter circuit configurations
without use of an external resistor.
DESCRIPTION
NPN resistor-equipped transistor in a
SOT23 plastic package.
PNP complement: PDTA114TT.
PINNING
PIN
1
2
3
DESCRIPTION
base/input
emitter/ground
collector/output
handbook, 4 columns
3
3
R1
1
2
1
Top view
2
MAM360
Fig.1 Simplified outline (SOT23) and symbol.
1
3
2
MGA893 - 1
Fig.2 Equivalent inverter
symbol.
MARKING
TYPE
NUMBER
PDTC114TT
MARKING
CODE(1)
∗12
Note
1. ∗ = p : Made in Hong Kong.
∗ = t : Made in Malaysia.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
VCBO
VCEO
VEBO
IO
ICM
Ptot
Tstg
Tj
Tamb
collector-base voltage
collector-emitter voltage
emitter-base voltage
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
operating ambient temperature
open emitter
open base
open collector
Tamb ≤ 25 °C; note 1
Note
1. Transistor mounted on an FR4 printed-circuit board.
MIN.
−
−
−
−
−
−
−65
−
−65
MAX.
50
50
5
100
100
250
+150
150
+150
UNIT
V
V
V
mA
mA
mW
°C
°C
°C
1999 Apr 16
2