PDTB114ET Datasheet, PDF (2/8 Pages) NXP Semiconductors – PNP resistor-equipped transistor

Philips Semiconductors
PNP resistor-equipped transistor
Objective specification
PDTB114ET
FEATURES
• Built-in bias resistors R1 and R2
(typ. 10 kΩ each)
• Simplification of circuit design
• Reduces number of components
and board space.
APPLICATIONS
• Especially suitable for space
reduction in interface and driver
circuits
• Inverter circuit configurations
without use of external resistors.
DESCRIPTION
PNP resistor-equipped transistor in a
SOT23 plastic package.
NPN complement: PDTD114ET.
PINNING
PIN
DESCRIPTION
1
base/input
2
emitter/ground (+)
3
collector/output
handbook, 4 columns
3
3
R1
1
R2
2
1
2
Top view
MAM100
Fig.1 Simplified outline (SOT23) and symbol.
1
3
2
MGA893 - 1
Fig.2 Equivalent inverter
symbol.
MARKING
TYPE
NUMBER
PDTB114ET
MARKING
CODE
p09
QUICK REFERENCE DATA
SYMBOL
PARAMETER
V_CEO
I_O
I_CM
P_tot
h_FE
R1
collector-emitter voltage
output current (DC)
peak collector current
total power dissipation
DC current gain
input resistor
RR-----21--
resistor ratio
CONDITIONS
open base
T_amb ≤ 25 °C
I_C = −50 mA; V_CE = −5 V
MIN.
−
−
−
−
56
7
TYP.
−
−
−
−
−
10
MAX.
−50
−500
−500
250
−
13
UNIT
V
mA
mA
mW
kΩ
0.8
1
1.2
1997 Sep 02
2