PCA24S08 Datasheet, PDF (2/16 Pages) NXP Semiconductors – 1024 ®8-bit CMOS EEPROM with access protection

Philips Semiconductors
1024 × 8-bit CMOS EEPROM with access protection
Product data
PCA24S08
DESCRIPTION
The PCA24S08 provides 8192 bits of serial electrically erasable and
programmable Read-only memory (EEPROM) organized as
1024 words of 8 bits each. Data bytes are received and transmitted
via the serial I²C-bus.
Access permissions limiting reads or writes are set via the I²C-bus
to isolate blocks of memory from improper access.
The PCA24S08 is intended to be pin compatible with standard
24C08 serial EEPROM devices except for pins 1, 2, and 3, which
are address pins in the standard part. Other exceptions to the
PCA24C08 serial EEPROM datasheet are noted the “Serial
EEPROM Exception” section later in this document.
All bits are sent to or read from the device, most significant bit first,
in a manner consistent with the 24C08 serial EEPROM. The bit
fields in this document are correspondingly listed with the MSB on
the left and the LSB on the right.
The EEPROM memory is broken up into 8 blocks of 1 k bits
(128 bytes) each. Within each block, the memory is physically
organized in to 8 pages of 128 bits (16 bytes) each. In addition to
these 8 k bits, there are two more 128-bit pages that are used to
store the access protection and ID information. There are a total of
8448 bits of EEPROM memory available in the PCA24S08.
Access protection (both read and write) is organized on a block
basis for blocks 1 through 7 and on a page and a block basis for
block 0. Protection information for these blocks and pages is stored
in one of the additional pages of EEPROM memory that is
addressed separately from the main data storage array. See
“Access Protection” for more details.
The ID value (see “ID Configuration”) is located in the ID page of the
EEPROM, the second of the additional 16 byte pages.
Writes from the serial interface may include from one to 16 bytes at
a time, depending on the protocol followed by the bus master. All
page accesses must be properly aligned to the internal EEPROM
page.
The EEPROM memory offers an endurance of 100,000 write cycles
per byte, with 10 year data retention. Writes to the EEPROM take
less than 5 ms to complete.
After manufacturing, all EEPROM bits will be set to a value of ‘1’.
FEATURES
• Non-volatile storage of 8 kbits organized as 8 blocks of 128 bytes
each
• I²C interface logic
• Compatible with 24C08 Serial EEPROM, and alternate source of
Atmel AT24RF08C without the RF interface
• Write operation:
– Byte write mode
– 16-byte page write mode
• Read operation:
– Sequential read
– Random read
• Programmable access protection to limit reads and writes
• Lock/unlock function
• Write protect feature protecting the full memory array against write
operations
• Self timed write cycle
• Internal power-on reset
• High reliability:
– Ten years non-volatile data retention time
– 100,000 write cycle endurance
• Low power CMOS technology
• Operating power supply voltage range of 2.5 V to 3.6 V
• 0 to 400 kHz clock frequency
• ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA
• Packages offered: SO8, TSSOP8
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
TOPSIDE MARK
8-pin plastic SO
–40 °C to +85 °C
PCA24S08D
P24S08
8-pin plastic TSSOP
–40 °C to +85 °C
PCA24S08DP
PS08
Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging.
DRAWING NUMBER
SOT96-1
SOT505-1
2004 May 10
2