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PCA24S08 Datasheet, PDF (10/16 Pages) NXP Semiconductors – 1024 ®8-bit CMOS EEPROM with access protection
Philips Semiconductors
1024 × 8-bit CMOS EEPROM with access protection
Product data
PCA24S08
APP MEMORY MAP
ADDRESS
BIT 7
0
SB0
1
SB1
2
SB2
3
SB3
4
SB4
5
SB5
6
SB6
7
SB7
8
SBAP
9
WPN7
10
DE
11
12
13
14
15
BIT 6
X
X
X
X
X
X
X
X
X
WPN6
DC
BIT 5
BIT 4
BIT 3
RF0
X
RF1
X
RF2
X
RF3
X
RF4
X
RF5
X
RF6
X
RF7
X
X
X
X
WPN5
WPN4
WPN3
X
X
X
Reserved R/W
Reserved R/W
Reserved R/W
Reserved R only
Device Revision
BIT 2
X
X
X
X
X
X
X
X
X
WPN2
X
BIT 1
BIT 0
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PBAP
WPN1
WPN0
X
TAMPER
PROT PIN
The PROT pin is used as a power good signal. When this pin is held
LOW, the serial port is held in reset and all sticky bits are set to one.
When HIGH, activity on the serial bus is permitted and sticky bits
can be set to their values.
SERIAL EEPROM EXCEPTIONS
In general, the two-wire serial interface on the PCA24S08 functions
identically to the 24C08. The following exceptions exist, as noted
elsewhere in this document.
• Pins 1, 2, and 3 have different usage.
• Access to various blocks may be restricted via the access
protection circuitry.
• The two block address bits (B2 and B1) in the command byte are
ignored with all read commands. they are set only via the write
command.
• Multi-byte reads do not cross block boundaries, but instead wrap
to the beginning of the block.
• The serial port will be reset whenever the PROT pin is LOW.
• If more than 16 bytes are written to the EEPROM with a page
write, overlapping bytes will have their values corrupted.
• If VDD is 0 V, the device draws current on the SDA, SCL, WP, and
PROT pins when they are brought above 0 V.
2004 May 10
10