GTL2004 Datasheet, PDF (2/10 Pages) NXP Semiconductors – Quad GTL/GTL to LVTTL/TTL bidirectional latched translator

Philips Semiconductors
Quad GTL/GTL+ to LVTTL/TTL
bidirectional latched translator
Product specification
GTL2004
FEATURES
• Operates as a quad GTL/GTL⁺ sampling receiver or as a
LVTTL/TTL to GTL/GTL⁺ driver
• Quad bidirectional bus interface
• Separate latch enable for each bit
• Live insertion/extraction permitted
• B outputs include 30Ω series resistance
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per JEDEC Std
DESCRIPTION
The GTL2004 is a quad translating transceiver designed for 3.3V
system interface with a GTL/GTL⁺ bus.
The direction pin allows the part to function as either a GTL to TTL
sampling receiver or as a TTL to GTL interface. Separate latch
enables allow sampling and holding of data from the GTL bus.
PIN CONFIGURATION
A0 1
LE0 2
A1 3
LE1 4
A2 ₅
LE2 6
A3 7
GND 8
16 V_CC
15 DIR
14 B0
13 B1
12 B2
11 B3
10 ^GTLREF
9 LE3
SW00318
PIN DESCRIPTION
PIN NUMBER SYMBOL
15
DIR
1, 3, 5, 7
A0 – A3
11, 12, 13, 14 B0 – B3
2, 4, 6, 9 LE0 – LE3
10
GTLREF
8
GND
16
V_CC
NAME AND FUNCTION
Direction control input
Data inputs/outputs (A side, GTL)
Data inputs/outputs (B side, TTL)
Latch enables
GTL reference voltage
Ground (0V)
Positive supply voltage
QUICK REFERENCE DATA
SYMBOL
PARAMETER
t_PLH
Propagation delay
t_PHL
An to Bn or Bn to An
C_IN
Input capacitance DIR, LEn
C_I/O
I/O pin capacitance
CONDITIONS
T_amb = 25°C
C_L = 50pF; V_CC = 3.3V
V_I = 0V or V_CC
Outputs disabled; V_I/O = 0V or 3.152V
TYPICAL
B to A
A to B
2.0
4.4
1.8
4.7
3.0
3.0
7.2
4.6
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
16-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
ORDER CODE
GTL2004 PW DH
DWG NUMBER
SOT403-1
1999 Jul 19
2
853–2165 21984