74HC2G126 Datasheet, PDF (2/20 Pages) NXP Semiconductors – Dual buffer/line driver; 3-state

Philips Semiconductors
Dual buffer/line driver; 3-state
Product specification
74HC2G126; 74HCT2G126
FEATURES
• Wide operating voltage from 2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• Very small 8 pins package
• Output capability: bus driver
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74HC2G/HCT2G126 is a high-speed Si-gate CMOS
device.
The 74HC2G/HCT2G126 provides one non-inverting
buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input pin (OE). A LOW at
pin OE causes the output as assume a high-impedance
OFF-state.
The bus driver output currents are equal compared to the
74HC/HCT126.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = r_f ≤ 6.0 ns.
SYMBOL
PARAMETER
CONDITIONS
t_PHL/t_PLH
C_I
C_O
C_PD
propagation delay nA to nY
input capacitance
C_L = 15 pF; V_CC = 5 V
output capacitance
power dissipation capacitance output enabled; notes 1 and 2
per buffer
output disabled; notes 1 and 2
TYPICAL
HC2G
10
1
1.5
11
1
HCT2G
12
1
1.5
11
1
UNIT
ns
pF
pF
pF
pF
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + Σ(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in Volts;
N = total switching outputs;
Σ(C_L × V_CC2 × f_o) = sum of the outputs.
2. For the 74HC2G126 the condition is V_I = GND to V_CC.
For the 74HCT2G126 the condition is V_I = GND to V_CC − 1.5 V.
2003 Mar 03
2