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74HC1G126 Datasheet, PDF (2/16 Pages) NXP Semiconductors – Bus buffer/line driver; 3-state
Philips Semiconductors
Bus buffer/line driver; 3-state
Product specification
74HC1G126; 74HCT1G126
FEATURES
• Wide operating voltage from 2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• Very small 5 pins package
• Output capability: bus driver.
DESCRIPTION
The 74HC1G/HCT1G126 is a highspeed Si-gate CMOS
device.
The 74HC1G/HCT1G126 provides one non-inverting
buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input pin (OE). A LOW at
pin OE causes the output as assume a high-impedance
OFF-state.
The bus driver output currents are equal compared to the
74HC/HCT126.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = rf ≤ 6.0 ns.
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CPD
propagation delay A to Y
input capacitance
power dissipation capacitance
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. For HC1G the conditions is VI = GND to VCC.
For HCT1G the conditions is VI = GND to VCC − 1.5 V.
TYPICAL
HC1G
9
1.5
30
HCT1G
10
1.5
27
UNIT
ns
pF
pF
FUNCTION TABLE
See note 1.
INPUTS
OE
A
H
L
H
H
L
X
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
OUTPUT
Y
L
H
Z
2002 May 15
2