TDA8310 Datasheet, PDF (18/24 Pages) NXP Semiconductors – PAL/NTSC colour processor for PIP applications

Philips Semiconductors
PAL/NTSC colour processor for
PIP applications
Preliminary specification
TDA8310
16. To obtain a good performance for both weak signal and VCR playback the time constant of the first control loop is
switched depending on the input signal condition. Therefore the circuit contains a noise detector and the time
constant is switched to ‘slow’ when excessive noise is present in the signal. This occurs when the internal video
signal is selected or for an external CVBS signal when the chrominance input (pin 16) is left open-circuit. The time
constant is always ‘fast’ when the chrominance input pin is connected to ground and the input is switched to the Y/C
mode. In the ‘fast’ mode during the vertical retrace time the phase detector current is increased 50% so that phase
errors due to head-switching of the VCR are corrected as soon as possible.
During weak signal conditions (noise detector active) the phase detector is gated and the width of the gate pulse has
a value of 5.7 µs so that the effect of the noise is reduced to a minimum.
The output current of the phase detector for the various conditions is shown in Table 1.
17. The timing pulses for the vertical ramp generator are obtained from the horizontal oscillator via a divider circuit.
This divider circuit has 2 search modes of operation:
a) The ‘large window’ mode is switched on when the circuit is not synchronized or, when a non-standard signal is
received (the number of lines per frame in the 50 Hz mode is between 311 and 314 and in the 60 Hz mode
between 261 and 264). In the search mode the divider can be triggered between line 244 and line 361
(approximately 45 to 64.5 Hz)
b) The ‘narrow window’ mode is switched on when more than 15 successive vertical sync pulses are detected in the
narrow window. When the circuit is in the standard mode and a vertical sync pulse is missing the retrace of the
vertical ramp generator is started at the end of the window. Consequently, the disturbance of the picture is very
small. The circuit will switch back to the search window when, for 6 successive vertical periods, no sync pulses
are found within the window.
18. To obtain a simple interface between the TDA8310 and the PIP processor the sandcastle output has been designed
such that the output is pulled down during scan and pulled up during the burst key pulse. During blanking the output
is high-ohmic and therefore the output voltage is determined by the load.
19. At a chrominance input voltage of 660 mV (p-p) (colour bar with 75% saturation i.e. burst signal amplitude
300 mV (p-p)) as given in Characteristics first parameter of Section “Chrominance input (pin 16)” the dynamic range
of the ACC is +6 and −20 dB.
20. All frequency variations are referenced to 3.58/4.43 MHz carrier frequency. All oscillator specifications are measured
with the Philips crystal series 9922 520. If the spurious response of the 4.43 MHz crystal is lower than −3 dB with
respect to the fundamental frequency for a damping resistance of 1 kΩ, oscillation at the fundamental frequency is
guaranteed. The spurious response of the 3.58 MHz crystal must be lower than −3 dB with respect to the
fundamental frequency for a damping resistance of 1.5 kΩ. The catching and detuning range are measured for
nominal crystal parameters. These are:
a) load resonance frequency f₀ (C_L = 20 pF) = 4.433619 or 3.579545 MHz
b) motional capacitance C_M = 20.6 fF (4.43 MHz crystal) or 14.7 fF (3.58 MHz crystal)
c) parallel capacitance C₀ = 5.5 pF (4.43 MHz crystal) or 4.5 pF (3.58 MHz crystal).
The actual load capacitance in the application should be C_L = 18 pF to account for parasitic capacitances on and off
chip.
The free-running frequency of the oscillator can be checked by the HUE control pin to the positive supply rail. In that
condition the colour killer is not active so that the frequency off-set is visible on the screen. When two or more crystals
are connected to the IC the circuit must be forced to one of the crystals during this test to prevent the oscillator
continuously switching between the various frequencies.
21. The crystal pins which are not used must be connected to the positive supply line via an 8.2 kΩ resistor. It is also
possible to connect the non-used pins together and use a resistor with a value of 8.2 kΩ divided by the number of
pins which are not used.
22. When this pin is left open-circuit the HUE control is set to the nominal value.
23. This value indicates the bandwidth of the complete chrominance circuit including the chrominance bandpass filter.
The bandwidth of the demodulator low-pass filter is approximately 1 MHz.
February 1995
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