TDA6502 Datasheet, PDF (17/44 Pages) NXP Semiconductors – 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners

Philips Semiconductors
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Preliminary specification
TDA6502; TDA6502A;
TDA6503; TDA6503A
11 CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supply; T_amb = 25 ^oC
V_CC
supply voltage
I_CC
supply current
4.5
at V_CC = 5 V
all PMOS ports ‘off’
−
one PMOS port ‘on’ and
−
sourcing 25 mA
one PMOS port ‘on’ and sourcing −
25 mA; a second port ‘on’ and
sourcing 5 mA
PLL part; V_CC = 4.5 to 5.5 V; T_amb = −20 to +85 °C; unless otherwise specified
FUNCTIONAL RANGE
V_POR
power-on reset supply
voltage
below this supply voltage power-on −
reset becomes active
N
divider ratio
15-bit frequency word
64
14-bit frequency word
64
f_XTAL
crystal oscillator frequency R_XTAL = 25 to 300 Ω
−
Z_XTAL
input impedance
f_XTAL = 4 MHz
600
(absolute value)
PMOS PORTS: PINS PUHF, PVHFL, PVHFH AND FMST
I_Pn(off)
leakage current
V_CC = 5.5 V; V_Pn = 0 V
−10
V_Pn(sat)
output saturation voltage
V_Pn(sat) = V_CC − V_Pn;
−
one buffer output is ‘on’ and
sourcing 25 mA
LOCK OUTPUT: PIN LOCK/ADC (IN 3-WIRE BUS MODE)
I_UNLOCK
output current when the PLL V_CC = 5.5 V; V_O= 5.5 V
−
is out-of-lock
V_UNLOCK
output saturation voltage
V_UNLOCK = V_CC − V_O; I_O = 200 µA −
when the PLL is out-of-lock
V_LOCK
output voltage
the PLL is locked
−
ADC INPUT: PIN LOCK/ADC (IN I²C-BUS MODE)
V_ADC
ADC input voltage
see Table 11
0
I_ADC(H)
HIGH-level input current
V_ADC = V_CC
−
I_ADC(L)
LOW-level input current
V_ADC = 0 V
−10
BUS FORMAT SELECTION: PIN SW
V_SW(L)
V_SW(H)
I_SW(H)
I_SW(L)
LOW-level input voltage
HIGH-level input voltage
HIGH-level input current
LOW-level input current
V_SW = V_CC
V_SW = 0 V
0
3
−
−100
5.0
71
103
111
3.2
−
−
4.0
1 200
−
0.25
−
0.4
0.2
−
−
−
−
−
−
−
5.5
V
78
mA
113 mA
122 mA
−
V
32 767
16 383
−
−
MHz
Ω
−
µA
0.4
V
200 µA
0.8
V
0.40 V
V_CC
V
10
µA
−
µA
1.5
V
V_CC
V
10
µA
−
µA
2000 Mar 16
17