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74HC4352 Datasheet, PDF (15/16 Pages) NXP Semiconductors – Dual 4-channel analog multiplexer/demultiplexer with latch
Philips Semiconductors
Dual 4-channel analog
multiplexer/demultiplexer with latch
TEST CIRCUIT AND WAVEFORMS
Product specification
74HC/HCT4352
Conditions
TEST
tPZH
tPZL
tPHZ
tPLZ
others
SWITCH
VEE
VCC
VEE
VCC
open
Vis
VCC
VEE
VCC
VEE
pulse
FAMILY AMPLITUDE VM
74HC VCC
74HCT 3.0 V
50%
1.3 V
tr; tf
fmax;
PULSE WIDTH
< 2 ns
< 2 ns
OTHER
6 ns
6 ns
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.21 Test circuit for measuring AC performance.
Conditions
TEST
tPZH
tPZL
tPHZ
tPLZ
others
SWITCH
VEE
VCC
VEE
VCC
open
Vis
VCC
VEE
VCC
VEE
pulse
FAMILY AMPLITUDE VM
74HC VCC
74HCT 3.0 V
50%
1.3 V
tr; tf
fmax;
PULSE WIDTH
< 2 ns
< 2 ns
OTHER
6 ns
6 ns
CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.22 Input pulse definitions.
December 1990
15