PCF50732 Datasheet, PDF (14/64 Pages) NXP Semiconductors – Baseband and audio interface for GSM

Philips Semiconductors
Baseband and audio interface for GSM
Objective specification
PCF50732
Offset compensation measurement can be done on three
channels separately: baseband receive I channel,
baseband receive Q channel and AUXADC channel. All
AUXADC channels use the same offset compensation
value. Starting an offset measurement is done by writing a
logic 1 into the offset trigger register for each channel that
needs calibration. If the value ‘7’ (decimal) is written into
the offset trigger register offsets will be measured for I, Q
and AUXADC channels.
Offsets can also be read or written directly. Each offset
measurement is implemented internally as an AUXADC
measurement and takes approximately 100 µs.
Offsets from −256 up to 255 can be compensated.
Table 4 Connection of BSI receive signals to the
PCF5087X
PCF50732
PCF5087X
PIN
I/O
PIN
I/O
RXON
I
RFSIG[z]
O
BDIO
I/O
SIOXD
I/O
BOEN
O
SIXEN_N
I
BIOCLK
O
SIOXCLK
I
9.3.4 BASEBAND SERIAL INTERFACE (BSI) TIMING CHARACTERISTICS
handbook, full pagewidth
TXI/Q⁽¹⁾
t ₄₂
t ₄₀
t ₄₃
ramp-up
32 QB
t ₄₄
intermediate ramp
32 QB
data
data
logic 1s
data
data
ramp-down trail
32 QB 2 BIOCLK
clocks
logic 1s
AUXDAC3
high-Z
BIOCLK
t7
high-Z
BDIO
high-Z
BIEN
TXON
d.c.⁽²⁾ d.c. d.c. B(0) B(1)
t ₃₉
t5
t6
B(n)
t9
t10
high-Z
MGR990
(1) TXI/Q = transmit I or Q.
(2) d.c. = don’t care; will be overwritten with logic 1.
Fig.5 Timing of the baseband serial interface transmit path; for the timing values see Table 5
1999 May 03
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