74AUP1G14_15 Datasheet, PDF (13/24 Pages) NXP Semiconductors – Low-power Schmitt trigger inverter

NXP Semiconductors
74AUP1G14
Low-power Schmitt trigger inverter
16. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
P_ad = f_i × (t_r × I_CC(AV) + t_f × I_CC(AV)) × V_CC where:
P_ad = additional power dissipation (μW);
f_i = input frequency (MHz);
t_r = input rise time (ns); 10 % to 90 %;
t_f = input fall time (ns); 90 % to 10 %;
I_CC(AV) = average additional supply current (μA).
Average I_CC differs with positive or negative input transitions, as shown in Figure 14.
An example of a relaxation circuit using the 74AUP1G14 is shown in Figure 15.
0.3
ΔI_CC(AV)
(mA)
0.2
001aad027
(1)
(2)
0.1
0
0.8
1.8
(1) Positive-going edge
(2) Negative-going edge.
Fig 14. Average I_CC as a function of V_CC
2.8
3.8
V_CC (V)
74AUP1G14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 28 June 2012
© NXP B.V. 2012. All rights reserved.
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