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| LPC18S5X_15 Datasheet, PDF (129/152 Pages) NXP Semiconductors – 32-bit ARM Cortex-M3 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC, AES engine | |||
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NXP Semiconductors
LPC18S5x/S3x
32-bit ARM Cortex-M3 microcontroller
LPC18xx
ADC
COMPARATOR
2 kΩ (analog pin)
2.2 kΩ (multiplexed pin)
Cia = 2 pF
Rvsi
ADC0_n/ADC1_n
Rs
VEXT
VSS
Rs < 1/((7 ï´ fclk(ADC) ï´ Cia) ï 2 kï
Fig 40. ADC interface to pins
Table 37. DAC characteristics
VDDA(3V3) over specified ranges; Tamb = ï40 ï°C to +105 ï°C; unless otherwise specified
Symbol Parameter
Conditions
Min
ED
differential linearity error 2.7 V ï£ VDDA(3V3) ï£ 3.6 V
[1] -
EL(adj) integral non-linearity
2.4 V ï£ VDDA(3V3) < 2.7 V
code = 0 to 975
2.7 V ï£ VDDA(3V3) ï£ 3.6 V
-
[1] -
2.4 V ï£ VDDA(3V3) < 2.7 V
-
EO
offset error
2.7 V ï£ VDDA(3V3) ï£ 3.6 V
[1] -
EG
gain error
2.4 V ï£ VDDA(3V3) < 2.7 V
2.7 V ï£ VDDA(3V3) ï£ 3.6 V
-
[1] -
2.4 V ï£ VDDA(3V3) < 2.7 V
-
CL
load capacitance
-
RL
load resistance
1
ts
settling time
[1]
[1] In the DAC CR register, bit BIAS = 0 (see the LPC18xx user manual).
[2] Settling time is calculated within 1/2 LSB of the final value.
Typ
ï±0.8
ï±1.0
ï±1.0
ï±1.5
ï±0.8
ï±1.0
ï±0.3
ï±1.0
-
-
0.4
002aag697
Max
Unit
-
LSB
-
LSB
-
LSB
-
LSB
-
LSB
-
LSB
-
%
-
%
200
pF
-
kï
ïï³
LPC18S5X_S3X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 24 February 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
129 of 152
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