SA56004X Datasheet, PDF (12/23 Pages) NXP Semiconductors – 1 Degrees Celcious accurate, SMBus-compatible, 8-pin, remote/local digital temperature sensor with over temperature alarms

Philips Semiconductors
±1 °C accurate, SMBus-compatible, 8-pin, remote/local
digital temperature sensor with over temperature alarms
Product data sheet
SA56004X
SA56004 SMBus REGISTERS
Command Register
The command register selects which register will be read or written
to. Data for this register should be transmitted during the Command
Byte of the SMBus write communication.
Local and Remote Temperature registers
(LTHB, LTLB, RTHB, RTLB)
Table 4. Local and Remote Temperature registers
bit assignment
High Byte (Read only address 00h, 01h)
Bit D7 D6 D5 D4 D3 D2 D1 D0
Value Sign 64 32 16 8
4
2
1
Low Byte (Read only address 10h)
Bit D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0
0
0
0
0
Configuration register
The configuration register is an 8-bit register with read address 03h
and write address 09h. Table 5 shows how the bits in this register
are used.
Table 5. Configuration Register (CON)
bit assignments
Bit
Name/Function
7
(MSB)
6
5
4
3
2
1
0
ALERT mask
The ALERT interrupt is enabled when this bit is
LOW. The ALERT interrupt is disabled
(masked) when this bit is HIGH.
RUN/STOP
Standby or run mode control: Running mode is
enabled when this bit is LOW. The SA56004X
is in standby mode when this bit is HIGH.
Not defined. Defaults to “0” (zero).
Remote T_CRIT mask
The T_CRIT output will be activated by a
remote temperature that exceeds the remote
T_CRIT setpoint when this bit is LOW. The
T_CRIT output will not be activated under this
condition when this bit is HIGH.
Not defined. Defaults to “0” (zero).
Local T_CRIT mask
The T_CRIT output will be activated by a local
temperature that exceeds the local T_CRIT
setpoint when this bit is LOW. The T_CRIT
output will not be activated under this condition
when this bit is HIGH.
Not defined. Defaults to “0” (zero).
Fault Queue
A single remote temperature measurement
outside the HIGH, LOW or T_CRIT setpoints
will trigger an outside limit condition resulting in
setting the status bits and associated output
pins when this bit is LOW. Three consecutive
measurements outside of one of these
setpoints are required to trigger an outside of
limit condition when this bit is HIGH.
POR
state
0
0
0
0
0
0
0
0
Status register
The contents of the status register reflects condition status resulting
from all activities: comparison between temperature measurements
and temperature limits, the status of A/D conversion, and the
hardware condition of external diode to the device. Bit assignments
are listed in Table 6. This register is read only and its address is 02h.
Upon POR, all bits are set to zero.
Note: any one of the fault conditions, with the exceptions of Diode
OPEN and A/D BUSY, introduces an Alert interrupt (see Alert
interrupt section on page 14). Also, whenever a one-shot command
is executed, the status byte should be read after the conversion is
completed, which is about 38 ms (1 conversion time period) after the
one-shot command is sent.
2004 Oct 06
12