74HC4017 Datasheet, PDF (12/12 Pages) NXP Semiconductors – Johnson decade counter with 10 decoded outputs

Philips Semiconductors
Johnson decade counter with 10 decoded outputs
Product specification
74HC/HCT4017
APPLICATION INFORMATION
Some applications for the “4017” are:
• Decade counter with decimal decoding
• 1 out of n decoding counter (when cascaded)
• Sequential controller
• Timer
Figure 10 shows a technique for extending the number of decoded output states for the “4017”. Decoded outputs are
sequential within each stage and from stage to stage, with no dead time (except propagation delay).
It is essential not to enable the counter on CP₁
when CP₀ is HIGH, or on CP₀ when CP₁ is LOW,
as this would cause an extra count.
Fig.10 Counter expansion
Figure 11 shows an example of a divide-by 2 through divide-by 10 circuit using one “4017”. Since “4017” has an
asynchronous reset, the output pulse widths are narrow (minimum expected pulse width is 6 ns). The output pulse widths
can be enlarged by inserting a RC network at the MR input.
Fig.11 Divide-by 2 through divide-by 10.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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