TDA6500TT Datasheet, PDF (11/40 Pages) NXP Semiconductors – 5 V mixer/oscillator and synthesizer for PAL and NTSC standards

Philips Semiconductors
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
Product specification
TDA6500TT; TDA6501TT
Table 9 Description of bits shown in Table 8
SYMBOL
A
MA1 and MA0
R/W
POR
FL
AGC
A2, A1 and A0
DESCRIPTION
acknowledge
programmable address bits; see Table 4
logic 1 for read mode
Power-on reset flag
POR = 0, normal operation
POR = 1, power-on state
in-lock flag
FL = 0, not locked
FL = 1, the PLL is locked
internal AGC flag
AGC = 0, internal AGC not active
AGC = 1, internal AGC is active; level below 3 V
digital output of the 5-level ADC; see Table 10
Table 10 ADC levels
VOLTAGE APPLIED TO ADC INPUT⁽¹⁾
0.60V_CC to V_CC
0.45V_CC to 0.60V_CC
0.30V_CC to 0.45V_CC
0.15V_CC to 0.30V_CC
0 to 0.15V_CC
Note
1. Accuracy is ±0.03V_CC.
A2
A1
A0
1
0
0
0
1
1
0
1
0
0
0
1
0
0
0
7.3 Power-on reset
The Power-on detection threshold voltage (V_POR) is set to V_CC = 3.5 V at room temperature. Below this threshold, the
device is reset to the Power-on state.
In the Power-on state, the charge pump current is set to 280 µA, the tuning voltage output is disabled, the test bits T2, T1
and T0 are set to 001, the AGC take-over point is set to 112 dBµV and the AGC current is set to the slow mode. The high
band is selected by default.
Table 11 Default bits at Power-on reset
BIT
NAME
BYTE
MSB
LSB
Address byte
ADB
1
1
0
0
0
MA1
MA0
X
Divider byte 1
DB1
0
X
X
X
X
X
X
X
Divider byte 2
DB2
X
X
X
X
X
X
X
X
Control byte
CB
1
1
0
0
1
X
X
1
Band switch byte BB
−
0
−
0
0
0
0
0
Auxiliary byte
AB
0
0
1
0
−
−
−
−
2003 Jun 05
11