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SA56202 Datasheet, PDF (11/24 Pages) NXP Semiconductors – One-chip motor driver | |||
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Philips Semiconductors
SA56202
One-chip motor driver
where NPP indicates the number of pole pairs of the motor. FG has an open-drain output
for easy interfacing to 3 V and 5 V logic.
7.7 Sled motor driver
Two current-steering PWM channels are available to drive a stepper motor. Per channel
an external sense resistor Rsense is used that is connected to ground. A peak-current
control loop is implemented that modulates the duty cycle of the PWM signal. See
Figure 9.
Rext VINSLD 47 kâ¦
47 kâ¦
VVINREF
input amplifier
+Σ
â
R
Q
S
LOGIC
DRIVE
DRIVER
M
VVINREF
CLOCK
70 kHz
A
IO
Rsense
001aaa435
Fig 9. Peak-current control architecture of stepper motor driver.
The clock generator has a nominal frequency of fosc/256 = 70 kHz. See Figure 10 for the
transfer function from input voltage VVINSLD to output current at a typical Rsense of 0.5 â¦.
Input-to-output transconductance gain can be scaled down by connecting an external
resistor Rext in series with the input VINSLD.
IOUT (A)
1A
VVINSLD â VVINREF (V)
dead zone
â30 mV
+1 A/V
30 mV
â1 A
+1 A/V
001aaa436
Fig 10. Transfer function of stepper motor driver.
Both limit current and transconductance gain are related to Rsense in the following way:
Transconductance gain, V--I---oi-n- = 2-----Ã-----R-1---s--e--n---s--e
9397 750 12772
Preliminary data sheet
Limit current, ILIM = -2----Ã----1-R--V--s--e--n---s--e
Rev. 01 â 19 July 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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