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PCA9537 Datasheet, PDF (11/17 Pages) NXP Semiconductors – 4-bit I2C and SMBus low power I/O port with interrupt and reset
Philips Semiconductors
4-bit I2C and SMBus low power I/O port
with interrupt and reset
Product data sheet
PCA9537
AC SPECIFICATIONS
SYMBOL
PARAMETER
STANDARD MODE
I2C-bus
MIN
MAX
fSCL
tBUF
tHD;STA
tSU;STA
tSU;STO
tHD;DAT
tVD;ACK
tVD;DAT
tSU;DAT
tLOW
tHIGH
tF
tR
tSP
Operating frequency
0
Bus free time between STOP and START conditions
4.7
Hold time after (repeated) START condition
4.0
Repeated START condition setup time
4.7
Setup time for STOP condition
4.0
Data in hold time
0
Valid time for ACK condition2
0.3
Data out valid time3
300
Data setup time
250
Clock LOW period
4.7
Clock HIGH period
4.0
Clock/Data fall time
—
Clock/Data rise time
—
Pulse width of spikes that must be suppressed by the
—
input filters
100
—
—
—
—
—
3.45
—
—
—
—
300
1000
50
Port Timing
tPV
Output data valid
tPS
Input data setup time
tPH
Input data hold time
Interrupt Timing
—
200
100
—
1
—
tIV
tIR
RESET
Interrupt valid
Interrupt reset
—
4
—
4
tW
tREC
tRESET
Reset pulse width
Reset recovery time
Time to reset
4
—
0
—
400
—
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
FAST MODE
I2C-bus
MIN
MAX
0
400
1.3
—
0.6
—
0.6
—
0.6
—
0
—
0.1
0.9
50
—
100
—
1.3
—
0.6
—
20 + 0.1 Cb1
300
20 + 0.1 Cb1
300
—
50
—
200
100
—
1
—
—
4
—
4
4
—
0
—
400
—
UNITS
kHz
µs
µs
µs
µs
ns
µs
ns
ns
µs
µs
ns
ns
ns
ns
ns
µs
µs
µs
ns
ns
ns
SDA
tBUF
tLOW
tR
tF
SCL
P
tHD;STA
S
tHD;DAT
tHIGH
tSU;DAT
tHD;STA
tSU;STA
Sr
Figure 12. Definition of timing
tSP
tSU;STO
P
SU00645
2004 Nov 29
11