74HC_HCT573_15 Datasheet, PDF (11/21 Pages) NXP Semiconductors – Octal D-type transparent latch; 3-state

NXP Semiconductors
74HC573; 74HCT573
Octal D-type transparent latch; 3-state
9_,
2(LQSXW
*1'
9_&&
RXWSXW
/2:WR2))
2))WR/2:
9_2/
9₂₊
RXWSXW
+,*+WR2))
2))WR+,*+
*1'
9₀
W_3/=
W_3=/
W₃₊₌


9₀
W₃₌₊
9₀
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
DDH
Fig 9.
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Enable and disable times
/(LQSXW
9₀
W _VX
W_K
W _VX
W_K
'QLQSXW
9₀
DDH
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 10. Set-up and hold times for data input (Dn) to latch input (LE)
Table 8. Measurement points
Type
74HC573
74HCT573
Input
V_M
0.5V_CC
1.3 V
Output
V_M
0.5V_CC
1.3 V
74HC_HCT573
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 26 January 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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