74HC162 Datasheet, PDF (10/11 Pages) NXP Semiconductors – Presettable synchronous BCD decade counter; synchronous reset

Philips Semiconductors
Presettable synchronous BCD decade
counter; synchronous reset
AC WAVEFORMS
Product specification
74HC/HCT162
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the clock (CP) to outputs (Q_n, TC) propagation delays, the clock pulse width, the
output transition times and the maximum clock frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the input (CET) to output (TC) propagation delays and output transition times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
Fig.10 Waveforms showing the set-up and hold times for the input (D_n) and parallel enable input (PE).
December 1990
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