PSMN003-25W Datasheet, PDF (1/8 Pages) NXP Semiconductors – PSMN003-25W

Philips Semiconductors
Product specification
N-channel logic level TrenchMOS™ transistor
PSMN003-25W
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Low thermal resistance
SYMBOL
d
g
s
QUICK REFERENCE DATA
V_DSS = 25 V
I_D = 100 A
R_DS(ON) ≤ 3.2 mΩ (V_GS = 10 V)
R_DS(ON) ≤ 3.5 mΩ (V_GS = 5 V)
GENERAL DESCRIPTION
SiliconMAX products use the latest
Philips Trench technology to
achieve the lowest possible
on-state resistance in each
package at each voltage rating.
Applications:-
• d.c. to d.c. converters
• switched mode power supplies
The PSMN003-25W is supplied in
the SOT429 (TO247) conventional
leaded package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT429 (TO247)
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DSS
V_DGR
V_GS
V_GSM
I_D
I_DM
P_D
T_j, T_stg
Drain-source voltage
Drain-gate voltage
Continuous gate-source
voltage
Peak pulsed gate-source
voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
T_j = 25 ˚C to 175˚C
T_j = 25 ˚C to 175˚C; R_GS = 20 kΩ
T_j ≤ 150 ˚C
T_mb = 25 ˚C; V_GS = 5 V
T_mb = 100 ˚C; V_GS = 5 V
T_mb = 25 ˚C
T_mb = 25 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
± 15
± 20
100¹
100¹
300
300
175
UNIT
V
V
V
V
A
A
A
W
˚C
1 Maximum continuous current limited by package.
October 1999
1
Rev 1.100