PMWD15UN Datasheet, PDF (1/12 Pages) NXP Semiconductors – Dual N-channel mTrenchMOS ultra low level FET

PMWD15UN
Dual N-channel µTrenchMOS™ ultra low level FET
Rev. 04 — 5 April 2005
Product data sheet
1. Product profile
1.1 General description
Dual common drain N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS™ technology.
1.2 Features
s Surface mounting package
s Very low threshold voltage
s Low profile
s Fast switching
1.3 Applications
s Portable appliances
s Battery management
s PCMCIA cards
s Load switching
1.4 Quick reference data
s V_DS ≤ 20 V
s P_tot ≤ 4.2 W
s I_D ≤ 11.6 A
s R_DSon ≤ 18.5 mΩ
2. Pinning information
Table 1:
Pin
1, 8
2, 3
4
5
6, 7
Pinning
Description
drain (D)
source1 (S1)
gate1 (G1)
gate2 (G2)
source2 (S2)
Simplified outline
8
5
Symbol
D
D
G1 S1 G2
S2
mbl600
1
4
SOT530-1 (TSSOP8)