PH1955L Datasheet, PDF (1/12 Pages) NXP Semiconductors – Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology.

PH1955L
N-channel TrenchMOS logic level FET
Rev. 01 — 15 August 2005
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features
s Logic level threshold
s 175 °C rated
s Low on-state resistance
s Surface-mounted package
1.3 Applications
s DC-to-DC converters
s Motors, lamps and solenoids
s General purpose power switching
s 12 V and 24 V loads
1.4 Quick reference data
s V_DS ≤ 55 V
s R_DSon ≤ 17.3 mΩ
s I_D ≤ 40 A
s Q_GD = 8 nC (typ)
2. Pinning information
Table 1:
Pin
1, 2, 3
4
mb
Pinning
Description
source (S)
gate (G)
mounting base;
connected to drain (D)
Simplified outline
mb
1234
SOT669 (LFPAK)
Symbol
D
G
mbb076 S