P89LPC924_925 Datasheet, PDF (1/49 Pages) NXP Semiconductors – 8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter

P89LPC924/925
8-bit microcontrollers with accelerated two-clock 80C51 core
4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter
Rev. 03 — 15 December 2004
Product data
1. General description
The P89LPC924/925 are single-chip microcontrollers designed for applications
demanding high-integration, low cost solutions over a wide range of performance
requirements. The P89LPC924/925 is based on a high performance processor
architecture that executes instructions in two to four clocks, six times the rate of
standard 80C51 devices. Many system-level functions have been incorporated into
the P89LPC924/925 in order to reduce component count, board space, and system
cost.
2. Features
2.1 Principal features
s 4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page
size, and single byte erase.
s 256-byte RAM data memory.
s Two 16-bit counter/timers. Each timer may be configured to toggle a port output
upon timer overflow or to become a PWM output.
s Real-Time clock that can also be used as a system timer.
s 4-input 8-bit multiplexed A/D converter/single DAC output. Two analog
comparators with selectable inputs and reference source.
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities.
s 400 kHz byte-wide I²C-bus communication port.
s Configurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash configuration bits). The RC oscillator (factory
calibrated to ±1 %) option allows operation without external oscillator
components. Oscillator options support frequencies from 20 kHz to the maximum
operating frequency of 18 MHz. The RC oscillator option is selectable and fine
tunable.
s 2.4 V to 3.6 V V_DD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s 15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset
options.